A set of chips that provides the interfaces between an Intel CPU and the PC's subsystems. An Intel chipset provides the buses and electronics to allow the CPU, RAM and I/O devices to interact.

Proposed architecture reduces the network diameter 50 percent compared to 2D mesh. This ends in less network average latency and power consumption considerably, which are demonstrated by performance ...

The on-chip communication is becoming the bottleneck for these SOC designs most of which employ shared-bus based communication architecture. This paper presents an efficient scalable communication ...